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The objective of this research is to address issues that relate to the assembly of Sn/Ag/Cu bumped flip chips.

Flip chips bumped with Sn/Ag/Cu bumps were assembled onto different lead‐free surface finishes at lead‐free soldering temperatures. Sensitivity to fluxes, reflow profiles, pad finishes and pad designs were all investigated and the potential consequences for assembly yields were calculated numerically.

Soldering defects, such as incomplete wetting and collapse and poor self‐centring were observed in the assemblies. Defect levels were sensitive to contact pad metallurgy and flux type, but not to flux level and reflow profile within the ranges considered. Owing to a particularly robust substrate‐pad design, defects observed in this work were limited to incomplete wetting and collapse, as well as poor self‐centering.

The scope of this work is limited to the lead‐free fluxes available at the time of research. A switch to lead‐free solder alloys in flip chip assemblies raises concerns with respect to the compatibilities of materials and the quality of soldering that is achievable. While this may be less of an issue in the case of larger area array components, such as ball grid arrays and chip scale packages, it is more of a concern for applications that use flip chips due to the smaller size of the solder spheres. Assembly yields tend to become more sensitive to the reduced collapse of the joints. More work is essential to investigate the potential benefits of more active lead‐free fluxes, both no‐clean tacky and liquid fluxes, in reducing or eliminating soldering defects.

The paper offers insights into assembly issues with Sn/Ag/Cu bumped flip chips.

This paper aims to develop a method to measure the length of cracks inside solder joints, which enables the validation of computed tomography (CT) crack length measurements.

Cracks were formed inside solder joints intentionally by aging solder joints of 0603 size resistors with thermal shock (TS) test (−40 to +140°C, 2,000 cycles), and CT images were captured about them with different rotational increment (1/4, 1/2 and 1°) of sample projection. The length of cracks was also measured with our method, which is based on capturing high-resolution radiography X-ray images about the cracks in two perpendicular projection planes. The radiography results were compared to the CT measurements. The percentage error for the different CT rotational increment settings was calculated, and the optimal CT settings have been determined.

The results have proven that reducing the rotational increment increases the sharpness of the captured images and the accuracy of crack length measurements. Nevertheless, the accuracy compared to high-resolution radiography measurements is only slightly better at 1/4° rotational increment than in the case of 1/2° rotational increment. It should be also noted that the 1/4° increment requires twice as much time for capturing the images as the 1/2° increment. So, the 1/2° rotational increment of sample projection is the optimal setting in our investigated case for measuring crack lengths.

The developed method is applicable to find the optimal settings for CT crack length measurements, which provides faster analysation of large quantity samples used, e.g. at life-time tests.

There is a lack of information in the literature regarding the optimisation of CT measurement set-up, e.g. a slightly larger value of the sample rotational increment can provide acceptable resolution with much faster processing time. Thus, the authors developed a method and performed research about optimising CT measurement parameters.

Thermal management of high-power (HP) light-emitting diodes (LEDs) is an essential issue. Junction temperature (T_J) and thermal resistance (R_th) are critical parameters in evaluating LEDs thermal management and reliability. The purpose of this paper is to study thermal and optical characteristics of ThinGaN (UX:3) white LED mounted on SinkPAD by three types of solder paste (SP): No-Clean SAC305 (SP1), Water-Washable SAC305 (SP2) and No-Clean Sn42/Bi57.6/Ag0.4 (SP3).

Thermal transient tester (T3Ster) machine is used to determine T_J and total thermal resistance (R_th–JA). In addition, the LED’s optical properties are measured via thermal and radiometric characterization of power LEDs (TeraLED) system. The LED is mounted on SinkPAD using SP1, SP2 and SP3 by stencil printing to control a thickness of SP and reflow soldering oven to minimize the number of voids. The LED with SP1, SP2 and SP3 is tested at various input currents and ambient temperatures.

The results indicate that at high input current, which equals to 1,200 mA, R_th–JA and T_J, respectively, are reduced by 30 and 17 per cent between SP1 and SP2. At same current value, R_th–JA and T_J are minimized by 42 and 25 per cent between SP1 and SP3, respectively. In addition, at an ambient temperature of 85°C, R_th–JA and T_J are decreased by 34 and 7 per cent between SP1 and SP2, respectively. Similarly, the reduction in R_th–JA and T_J between SP1 and SP3 is 44 and 10 per cent, respectively. Luminous flux, luminous efficacy and color shift of the LED with the three types of SPs are compared and discussed. It is found that the SP1 improves the chromatic properties of the LED by increasing the overall light efficiency and decreasing the color shift.

Thermal and optical performance of ThinGaN LEDs mounted on SinkPAD via three types of SPs is compared. This investigation can assist the research on thermal management of HP ThinGaN-based LEDs.